1. Field of the Invention
The present invention relates to a semiconductor device which sets dead time to control each semiconductor element, and particularly to a semiconductor device capable of easily determining dead time optimum for a semiconductor element and maintaining a stable control state.
2. Background Art
There are known semiconductor switches formed by configurations called arms, in which two semiconductor elements are arranged vertically. In the configurations, the semiconductor element on the upper side is called upper arm, and the semiconductor element on the lower side is called lower arm. When the upper arm and the lower arm are both on, a short circuit (arm short-circuit) occurs between the upper arm and the lower arm, so that a short-circuit current flows, thus producing bad influences such as characteristic degradation of the upper and lower arms.
Such an arm short-circuit is caused by turning on of the lower arm before the upper arm is completely turned off, for example. In order to prevent the arm short-circuit, a command to turn off one of the arms is transmitted and thereafter a command to turn on the other arm is transmitted after a time interval called dead time has elapsed. Here, the dead time indicates the time set to compensate for prevention of simultaneous turning-on of the upper and lower arms. It is general that the dead time is set to the maximum value of the time necessary for an off operation of each semiconductor element.
A power conversion device disclosed in a patent document 1 is equipped with a dead time control circuit to detect outputs of respective arms and determine dead time from the values thereof. The dead time generated by the dead time control circuit is determined or fixed in such a manner that a short circuit can be suppressed and a high-frequency operation can be performed under satisfactory control.
Earlier Literature related to above descriptions are [Patent Document 1] JP-A-10-337046, [Patent Document 2] JP-A-2002-204581, [Patent Document 3] JP-A-9-172786, [Patent Document 4] JP-A-2003-324928 and, [Patent Document 5] JP-A-2001-69795.
When a command is given to each semiconductor device, the power conversion device disclosed in the patent document 1 computes or calculates optimum dead time as its occasion arises. That is, in order to generate a command, there is a need to compute dead time after the measurement of current flowing through the semiconductor element. Thus, the power conversion device disclosed in the patent document 1 was accompanied by the problem that processing was complex. A problem also arises in that a deviation occurs between a commanded control value and an actual control value due to the provision of the dead time, thus impairing the stability of control.